Top 30+ AI Chip Makers: NVIDIA & Its Competitors
Based on our experience running AIMultiple’s cloud GPU benchmark with 10 different GPU models in 4 different scenarios, these are the top AI hardware companies for data center workloads.
30+ AI chip makers by category
*Selected AI chip is the part, platform, or announced project that best represents each vendor. Some entries are systems, services or licensable IP rather than a single chip.
Sorting is by category. Vendors are ranked by estimated share of AI accelerator revenue within the first three categories (leading producer, public cloud, public AI cloud), because sales numbers or cloud usage can be estimated. Intel and Qualcomm are the exceptions. Both are listed as leading producers on their data center scale and announced accelerator roadmaps, not on shipping AI accelerator revenue. Vendors in the custom AI ASIC / XPU co-design category are ranked by estimated share of the custom-ASIC design market. Vendors in all other categories are sorted alphabetically.
GPUs vs ASICs in AI chip architectures
While the vendors above compete in the same market, they use fundamentally different chip architectures:
- GPUs (Graphics Processing Units) are broadly programmable parallel processors that support a wider range of AI training and inference workloads than most purpose-built ASICs. NVIDIA and AMD dominate this category.
- ASICs (Application-Specific Integrated Circuits) are custom-designed for specific tasks. Some support both training and inference (Google TPU, AWS Trainium), while others are inference-only (Groq LPU, AWS Inferentia).
According to TrendForce1 , AI server shipments built on custom ASICs from cloud providers were projected in October 2025 to grow 44.6% in 2026, against 16.1% for GPU-based AI servers. Those figures are AI server shipment growth rates split by accelerator type, not counts of chips shipped. TrendForce now puts ASIC-based systems at about 27% of 2026 AI server unit shipments, down from 27.8% on April 15, 2026 after chip validation and tuning delays at Meta and AWS, against 69.7% for GPU-based systems, with ASICs reaching roughly 40% by 2030.2
Which are the leading AI chip producers?
1. NVIDIA
NVIDIA has been designing graphics processing units (GPUs) for the gaming sector since the 1990s. NVIDIA is a fabless chip manufacturer that outsources most of its chip manufacturing to TSMC. Its main businesses include:
Desktop AI solutions
DGX Spark (formerly Project Digits) is a desktop AI supercomputer featuring a Grace Blackwell Superchip with an NVIDIA Blackwell RTX GPU with 6,144 CUDA cores and fifth-generation Tensor Cores with FP4 precision, connected via the NVIDIA NVLink-C2C chip-to-chip interconnect to a 20-core NVIDIA Grace CPU, with up to 1 petaflop of AI compute and 128GB of unified memory.3 4
Data center solutions
The company makes AI chips following its Ampere, Hopper, and, most recently, Blackwell architectures. Thanks to the generative AI boom, NVIDIA’s revenue grew sharply, its market capitalization passed $1 trillion, and it strengthened its lead in the GPU and AI hardware markets. The following chart shows how NVIDIA’s revenue in this segment has grown over the years and how it has become the company’s primary source of income.
Chart data comes from NVIDIA Corporation financial reports.5
DGX™ A100 and H100 have been NVIDIA’s flagship AI chips, designed for AI training and inference in data centers. NVIDIA followed up on these with:
- H200, B300 and GB300 chips
- HGX servers such as HGX H200 and HGX B300 that combine 8 of these chips
- NVL series and GB200 SuperPod that combine even more chips into large clusters.6
Cloud GPUs
Most cloud players offer NVIDIA hardware as their cloud GPUs. Morgan Stanley put NVIDIA at roughly 85% of AI processor revenue in March 2026, with custom ASICs above 10% and AMD below 5%.7 Bloomberg Intelligence expects NVIDIA to hold 70% to 75% of the AI accelerator market through 2030.8
NVIDIA also launched its DGX Cloud offering, providing cloud GPU infrastructure directly to enterprises, bypassing cloud providers.
GPUs for graphics
NVIDIA’s GPUs for retail users include the GeForce series, and Nintendo’s Switch 2 runs on a custom NVIDIA processor.9
Recent developments
DGX Cloud Lepton
Announced on May 19, 2025, NVIDIA’s DGX Cloud Lepton is a marketplace that connects AI developers to NVIDIA’s GPU cloud providers, including CoreWeave, Lambda, and Crusoe.10
NVIDIA Dynamo
NVIDIA Dynamo, announced at GTC 2025, is an open-source inference framework for high-throughput, low-latency deployment of generative AI models in distributed environments.11
NVIDIA RTX PRO Servers and Enterprise AI Factory
Announced in May 2025 at Computex, NVIDIA introduced RTX PRO Servers powered by RTX PRO 6000 Blackwell Server Edition GPUs, designed for enterprise AI factories.12
NVIDIA Vera Rubin platform
NVIDIA unveiled Vera Rubin, its platform after Blackwell Ultra, at CES 2026 as a six-chip platform.13 At GTC on March 16, 2026 NVIDIA expanded it to seven chips, the Vera CPU, Rubin GPU, NVLink 6 Switch, ConnectX-9 SuperNIC, BlueField-4 DPU, Spectrum-6 Ethernet switch and Groq 3 LPU, and declared them in full production.14 Production shipments begin in fall 2026, initially to eight cloud partners.15 Blackwell and the GB300 NVL72 remained the revenue volume product through Q1 FY2027.
The Vera Rubin NVL72 rack pairs 72 Rubin GPUs with 36 Vera CPUs for 3,600 PFLOPS of NVFP4 inference, 20.7 TB of HBM4 and 260 TB/s of NVLink 6 scale-up bandwidth.16 The Rubin GPU is reported to be built on TSMC’s N3P with HBM4, a node NVIDIA has not confirmed.
The seventh chip comes from NVIDIA’s December 2025 licensing agreement with Groq, covered in the Groq section below.
The Groq 3 LPU is a dedicated inference chip, and Samsung Foundry manufactures it.17 Groq 3 LPX racks are slated for the second half of 2026, and NVIDIA projects up to 35x higher throughput per megawatt for trillion-parameter models when LPX is paired with Vera Rubin NVL72.18
DeepSeek
Release of DeepSeek’s R1 showed that frontier models could be trained with a relatively small number of GPUs. This led to a reduction in NVIDIA’s stock price.
Given that GPU systems’ performance improves multiple times annually due to advances in chip design and interconnect, buyers would be wise not to buy beyond their annual needs, as this can lead to owning outdated systems.
Tariffs & export restrictions
Four separate measures govern advanced AI chip sales to China, and they are frequently conflated.
Licensing changed first. On January 13, 2026 the US Bureau of Industry and Security announced a final rule moving license applications for the NVIDIA H200, AMD MI325X and similar chips from a presumption of denial to case-by-case review, subject to conditions covering exporter certifications, customer-verification checks and independent pre-shipment testing.19 A volume cap runs alongside it: aggregate shipments of a given chip to China and Macau may not exceed 50% of the quantity of that same product the exporter has shipped to US customers for US end-use.20
Two further measures are both set at 25% and are routinely treated as one. President Trump announced a 25% US government revenue share on H200 sales to China on December 8, 2025 and restated it on January 14, 2026, while the White House announced a distinct 25% Section 232 tariff on advanced semiconductors at the same performance thresholds on January 14, 2026, with carve-outs including US data centers and US R&D.21
China has moved in the other direction, though less formally. Reuters reported on November 5, 2025, citing unnamed sources, that authorities had barred foreign AI chips from state-funded data centers, and no official Chinese regulation to that effect has been published.
Permission has not translated into sales. On July 14, 2026, Under Secretary of Commerce Jeffrey Kessler told a congressional hearing that “very few shipments against licenses for H200s and equivalents have taken place. It’s a very small quantity of chips.” NVIDIA had booked zero China data center compute revenue as of both its February 2026 and its May 2026 results.
Inference Market Competition
While NVIDIA dominates the AI “training” market, competition is heating up in “inference,” the deployment of AI models for real-world tasks. Companies like AMD and Qualcomm, alongside inference specialists including Cerebras, SambaNova, d-Matrix and Positron, are developing chips that aim to provide more cost-effective inference solutions, with a particular focus on lower power consumption. The field has thinned as well as grown. Untether AI shut down in June 2025 and filed for bankruptcy that October, and Groq’s inference technology was licensed to NVIDIA in December 2025.
New “reasoning” AI techniques demand more computing power. NVIDIA believes that reasoning will favor its architecture in the long run and expects the inference market to eventually dwarf the training market in size, even if its market share is smaller.22
2. AMD
AMD is a fabless chip manufacturer with CPU, GPU, and AI accelerator products.
AMD launched MI300 for AI training workloads in June 2023 and is competing with NVIDIA for market share. Startups, enterprises and tech giants adopted AMD hardware in 2023, when NVIDIA hardware was difficult to procure amid the generative AI boom triggered by the launch of ChatGPT.23 24 25
In 2025, AMD acquired a team of AI hardware and software engineers from Untether AI along with compiler startup Brium. In June 2026 AMD announced the acquisition of MEXT, whose predictive-memory technology is designed to make flash behave more like DRAM and cut data center memory cost.26 27
AMD launched the Instinct MI350X and MI355X on June 12, 2025 at Advancing AI 2025.28 The MI355X is built on CDNA4 at TSMC 3nm with 288 GB of HBM3E and 10.1 PFLOPS of MXFP4, and AMD positions it against NVIDIA’s Blackwell B200 rather than the H200. AMD followed on May 7, 2026 with the Instinct MI350P, a passive PCIe 5.0 card carrying 144 GB of HBM3E and a 600 W maximum TBP.29
AMD has signed four large-scale Instinct agreements since October 2025: OpenAI on October 6, 2025 covering 6 GW, with the first 1 GW of MI450 Series capacity from the second half of 2026;30 Oracle Cloud Infrastructure as launch partner on October 14, 2025 for an initial 50,000 MI450 Series GPUs from calendar Q3 2026;31 Meta on February 24, 2026 for up to 6 GW from the second half of 2026, using a custom Instinct GPU based on the MI450 architecture rather than a stock MI450;32 33 and Anthropic on July 22, 2026 for up to 2 GW of MI450 Series GPUs in Helios racks from the first half of 2027.34
After a public AMD and NVIDIA disagreement over benchmarking H100 and MI300, the latest benchmarks put MI300 better or on par with H100 for inference on a 70B LLM.35
MI400 series
AMD launched the Instinct MI400 Series at Advancing AI 2026 on July 22-23, 2026.36 The MI455X is the AI-focused member of the family. AMD lists it as CDNA5 on “TSMC 2nm | 3nm FinFET” with 320 billion transistors, 432 GB of HBM4, 23.3 TB/s of peak memory bandwidth and 40.3 PFLOPS of OCP MXFP4.37 Helios, the rackscale system built around the MI400 Series, is in full production with first shipments starting at the end of Q3 2026.38
A third family member, the MI440X, was introduced at CES 2026 on January 5, 2026 for on-premises enterprise AI in a compact, eight-GPU form factor, and AMD has published no specifications for it since.39 Further out, AMD’s roadmap places the Instinct MI500 Series in 2027 and the MI600 Series in 2028, with the CDNA 6 architecture, 2nm process technology and HBM4E memory detail for MI500 given at CES 2026.40
The MI430X is the HPC and sovereign-AI member of the MI400 Series. AMD announced it on November 19, 2025 during SC25 week rather than at Advancing AI 2026, at 432 GB of HBM4 and 19.6 TB/s, and updated its specifications on July 23, 2026. AMD’s product page now lists up to 288 TFLOPS of hardware-based peak theoretical FP64, up to 9.2 PFLOPS of peak FP4 and MXFP4, 432 GB of integrated HBM4 and up to 23.3 TB/s of peak theoretical memory bandwidth.41 The distinguishing feature against the MI455X is full-rate FP64 for scientific computing rather than low-precision AI throughput.
AMD expects the MI430X to be available in 2027 and has published no transistor count, board power or lithography for it. Two figures in AMD’s own materials disagree. The MI400-series landing-page FAQ still states up to 19.6 TB/s where the MI430X specification page gives 23.3 TB/s, and the FAQ on the MI430X page contains a typo reading 2.3 TB/s.42
AMD names three target systems for the MI430X: Discovery at Oak Ridge National Laboratory, planned for 2028; Alice Recoque, France’s first exascale system; and Herder at HLRS Stuttgart, announced with HPE on December 2, 2025. Lux, the Oak Ridge AI factory cluster announced on October 27, 2025, is built on MI355X and is not an MI430X system.
Software
AMD’s AI software runs on the ROCm stack. SemiAnalysis, in a December 22, 2024 benchmark of MI300X against H100 and H200, gave AMD a 0% chance of breaking NVIDIA’s CUDA moat, finding that CUDA worked out of the box for most tasks while AMD software required significant configuration.43
The same analysts have since revised that call, on July 25, 2026, to “a great chance of success as long as AMD solves the two major risks we outline below”: the Helios rack production ramp, where weak SerDes require up to 85% of the backplane to be retimed with over 550 Broadcom ethernet retimers per rack, and a persistent lack of stable internal GPU clusters for software development and automated-testing CI.44
At Advancing AI 2026 AMD committed to a fixed six-week feature-release cadence in place of its previous roughly quarterly cycle.45
Ecosystem
Like NVIDIA, AMD is selectively investing in users of its solutions to drive adoption of its hardware.46 It has also tied equity to its largest commitments, issuing OpenAI and Meta each a performance-based warrant for up to 160 million shares at $0.01, vesting against Instinct shipment milestones.47
3. Intel
Intel has a long history of semiconductor development. Unlike the fabless NVIDIA and AMD, Intel owns its own fabs and builds parts such as the 18A-based Xeon 6+ in-house. It is not exclusively self-supplied. It also sources AI-related components from TSMC, and Gaudi 3 itself was manufactured on TSMC’s 5nm process.48
Gaudi 3 is the last dedicated AI accelerator in Intel’s Gaudi line. Intel has announced no Gaudi successor, and every step of its published roadmap after it is a GPU.49 50 The chip itself has not been withdrawn. Intel’s product page still lists the Gaudi 3 PCIe card (HL-338) as shipping, and Intel has published no end-of-life notice for it.51 Intel targeted $500 million in Gaudi revenue for 2024 and abandoned the target on its third-quarter earnings call on October 31, 2024. At CES 2026 it conceded that Gaudi “did not meet the needs of the frontier AI training market.”52
Intel cancelled its Falcon Shores GPU to pivot to Jaguar Shores, a rack-scale AI accelerator whose confirmed details are limited to the Gaudi branding and SK hynix HBM4 memory, with no process node stated.53 At CES 2026 Intel’s roadmap referred to “the Shores product line” without the Jaguar name, and Intel has not announced a rename. Intel made fresh AI hardware announcements at Computex 2026 including its Xeon 6+ processor on the 18A node.54 55
Crescent Island is a Xe3P-based, inference-optimized data center GPU, first announced on October 14, 2025 at the OCP Global Summit with 160GB of LPDDR5X and customer sampling expected in the second half of 2026.56 Intel detailed it at Computex 2026 as a 350W air-cooled PCIe card supporting data types from FP4 through FP64, with up to 480GB as the maximum partners may build to rather than the card’s own capacity.57
4. Qualcomm
Qualcomm is a fabless designer best known for mobile SoCs, and it has announced a data center product line built around inference. The older Cloud AI 100 family is the Qualcomm data center line that buyers can order today. Two Qualcomm brands one letter apart sit either side of that line. Dragonwing, introduced on February 25, 2025, covers industrial and embedded IoT, networking and cellular infrastructure and carries the company’s edge AI parts, while Dragonfly, launched on June 24, 2026, is the data center brand.58
AI200, AI250 and the data center roadmap
On October 27, 2025, Qualcomm announced the AI200 and AI250, two rack-scale AI inference solutions; both now sit under the Dragonfly brand Qualcomm launched in June 2026.59 The AI200 supports 768 GB of LPDDR per card, and Qualcomm said at announcement that the AI200 and AI250 were expected to be commercially available in 2026 and 2027 respectively; it has not restated either date since. The AI250 introduces a near-memory computing architecture that Qualcomm says delivers 133 TB/s of effective memory bandwidth per card, 18 times the AI200, a claim for a product nobody can buy yet. Both racks use direct liquid cooling, and Qualcomm now specifies a 140 kW OCP ORv3-compliant rack rather than the 160 kW quoted at announcement.60
On June 24, 2026, Qualcomm unveiled three further data center products.61 The Dragonfly C1000 is a data center CPU expected to reach commercial availability in 2028, and Qualcomm named Meta as its customer under a multi-generation collaboration covering data center CPUs rather than AI accelerators. Qualcomm High Bandwidth Compute (HBC) bonds compute with accelerated memory bandwidth in a 3D-stacked silicon solution, making it a compute architecture rather than a memory part, and HBC Gen 1, paired with the AI250, is expected to reach commercial sampling in mid-2027. The Dragonfly AI300 is an inference accelerator with commercial sampling expected in 2028. Qualcomm targets more than $15 billion of data center revenue by fiscal 2029.62
Qualcomm expects initial shipments to a hyperscaler custom silicon customer, which it has not named, later in calendar 2026.
Acquisitions and the Cloud AI 100 family
Qualcomm completed its acquisition of Alphawave on December 18, 2025. On June 24, 2026 it agreed to acquire Modular Inc, a transaction expected to close in the second half of 2026 subject to regulatory approvals.63
Before the Dragonfly line, Qualcomm’s data center inference accelerators were the Cloud AI 100 cards. The Cloud AI 100 Pro PCIe card draws 75 W and is rated at up to 400 TOPS INT8 and up to 200 TFLOPS FP16.
Which public cloud providers produce AI chips?
5. AWS
AWS produces Trainium chips for model training and Inferentia chips for inference. It began developing its own chips after Google.
Trainium2 chips form the Project Rainier cluster, which powers LLM developer Anthropic’s models. The count at the cluster’s October 2025 launch was nearly half a million chips, and Anthropic stated on April 20, 2026 that it uses over one million Trainium2 chips.64
Trainium3 and Trn3 UltraServers reached general availability on December 2, 2025.65 Trainium3 is AWS’s fourth-generation AI chip and its first built on a 3nm process, rated at 2.52 PFLOPS of FP8 compute, 144 GB of HBM3e and 4.9 TB/s of memory bandwidth per chip. A Trn3 UltraServer scales to 144 chips for 362 FP8 PFLOPS, 20.7 TB of HBM3e and 706 TB/s of memory bandwidth.
AWS announced Trainium4 as a roadmap item at re:Invent 2025, with support for NVIDIA NVLink Fusion. On the Q1 2026 earnings call, Amazon said Trainium4 is about 18 months from broad availability and is largely reserved already.66
6. Google Cloud Platform
Google Cloud TPU is the purpose-built machine learning accelerator chip that powers Google products. Google announced TPUs in 2016.67 Trillium TPU is the 6th generation.68
Ironwood, also called TPU v7 or TPU7x, is designed for complex “thinking models” like LLMs and MoEs, with 4,614 TFLOPS of FP8 compute per chip and up to 42.5 Exaflops in 9,216-chip pods.69 It offers 2x the power efficiency of Trillium. Each chip carries 192 GB of High Bandwidth Memory at 7.37 TB/s, with 1.2 TB/s bidirectional (9.6 Tb/s) Inter-Chip Interconnect and an enhanced SparseCore for large embeddings.70 It entered preview on November 24, 2025 and reached general availability on March 31, 2026.71
At Cloud Next on April 22, 2026, Google announced its eighth TPU generation as two purpose-built chips, TPU 8t for training and TPU 8i for inference.72 A TPU 8t superpod scales to 9,600 chips, two petabytes of shared HBM and 121 ExaFLOPS at FP4. Google says both will be generally available later in 2026.
7. Alibaba
Alibaba designs AI accelerators through its chip unit T-Head (PingTouGe), on a self-developed parallel processing unit (PPU) architecture with a custom ICN interconnect.73
T-Head publicly detailed the Zhenwu 810E on January 29, 2026. The chip carries 96 GB of HBM2e and 700 GB/s of inter-chip bandwidth across 7 independent ICN links, performance the company describes as comparable to NVIDIA’s H20, and Alibaba Cloud deploys it in 10,000-card clusters. This was a specification disclosure rather than a product launch. The 810E is not new 2026 silicon, and the 10,000-card deployments predate the announcement.
On May 19-20, 2026, Alibaba announced the Zhenwu M890, with 144 GB of memory, 800 GB/s of inter-chip interconnect bandwidth, native support from FP32 down to FP4, and three times the performance of the 810E. It ships inside the Panjiu AL128 supernode, which holds 128 accelerators per rack and uses the ICN Switch 1.0 at 25.6 Tbps. Alibaba states that cumulative deliveries of the Zhenwu series exceed 560,000 units. That figure covers the whole series, not M890 units.
Some North American, European, and Australian organizations (e.g., those in the defense industry) may not prefer to use Alibaba Cloud for geopolitical reasons.
8. IBM
IBM announced its deep learning chip, the artificial intelligence unit (AIU), in 2022.74 The IBM AIU builds on the IBM Telum Processor, which powers the AI processing capabilities of IBM Z mainframe servers.75 IBM also demonstrated that merging compute and memory can lead to efficiencies in the North Pole processor prototype.76
The IBM AI accelerator that ships commercially is the Spyre Accelerator, announced on October 7, 2025 and generally available from October 28, 2025 on z17 and LinuxONE 5, and from early December 2025 on Power11.77 Spyre carries 32 accelerator cores and 25.6 billion transistors on a 5nm process, packaged as a 75W PCIe card with 128 GB of LPDDR5. Up to 48 cards cluster in a Z or LinuxONE system, against 16 in Power.
9. Huawei
Huawei’s HiSilicon Ascend 910C is part of the Ascend 910 family of chips introduced in 2019.
AI labs in China are experimenting with the Ascend 910C. Huawei’s cloud is hosting DeepSeek models, and a researcher at DeepSeek claims that it can reach 60% of NVIDIA H100 inference performance.78
Huawei debuted the Ascend 950PR chip alongside the Atlas 350 accelerator card on March 20, 2026.79 The Atlas 350 card is specified at 1.56 PFLOPS of FP4 compute, 112 GB of Huawei’s proprietary HiBL 1.0 HBM at 1.4 TB/s of memory bandwidth, 600 W of power and 2 TB/s of interconnect. Those memory figures belong to the card. The Ascend 950PR silicon itself is specified at 128 GB and 1.6 TB/s. Huawei claims the card delivers 2.8 times the performance of NVIDIA’s H20, which is not a like-for-like comparison, because the Hopper-class H20 has no native FP4 support.
Huawei has published one Ascend roadmap, at its Huawei Connect 2025 keynote on September 18, 2025.80 It lists Ascend 950PR in Q1 2026, Ascend 950DT in Q4 2026, Ascend 960 in Q4 2027 and Ascend 970 in Q4 2028. The Ascend 950DT is specified for 144 GB of HiZQ 2.0, Huawei’s second in-house HBM, 4 TB/s of memory bandwidth, 2 TB/s of interconnect and decode plus training workloads, but as of July 2026 it is a roadmap commitment rather than a launched product. Huawei showed the Atlas 950 SuperPoD at WAIC 2026 on July 18, 2026, with commercial rollout still set for Q4 2026. Reports of an “Ascend 920” trace back to April 2025 supply-chain coverage (DigiTimes Asia, April 17, 2025; Commercial Times, April 21, 2025) describing a rumored SMIC N+3 / 6nm replacement for the H20. Huawei has never announced, specified or shipped such a part, and it appears nowhere on the published roadmap.
Which cloud AI providers produce their own chips?
These providers do not have public clouds with comprehensive capabilities like the hyperscalers. They provide limited cloud services, typically focused on AI inference. We were able to sign up for these services without talking to sales teams:
10. Groq
Groq was founded by former Google employees and built its business around the LPU (Language Processing Unit), a chip architecture aimed at low-latency inference rather than training.
On December 24, 2025, Groq announced that it had entered a non-exclusive licensing agreement with NVIDIA covering Groq’s inference technology, and that founder and CEO Jonathan Ross, president Sunny Madra and other senior team members had joined NVIDIA.81 Groq stated that it continues as an independent company. CNBC put the transaction at a reported ~$20 billion in cash, which would make it NVIDIA’s largest to date, a figure attributed to Alex Davis, CEO of Groq investor Disruptive, who also said NVIDIA acquires all of Groq’s assets except the GroqCloud business.82 NVIDIA has published no press release on the deal, NVIDIA CFO Colette Kress declined to comment on the price, and Reuters noted that neither company confirmed it. Jensen Huang told employees, “While we are adding talented employees to our ranks and licensing Groq’s IP, we are not acquiring Groq as a company.” NVIDIA unveiled the resulting product, the NVIDIA Groq 3 LPU, at GTC on March 16, 2026 as the seventh chip of the Vera Rubin platform.83
Groq now operates as an inference cloud provider. In June 2026 the company said it runs 13 data centers across North America, Europe, the Middle East and APAC, serves more than five million developers, and is scaling its inference cloud toward 200 MW of capacity by 2027.84 Its Dammam data center, built with Aramco Digital, sits behind a $1.5 billion Saudi investment commitment announced in February 2025.85
Groq has raised roughly $2.4 billion in disclosed funding and shipped products including the GroqChip™ Processor and the GroqCard™ Accelerator.86 Its most recent round, $650 million in growth capital announced on June 22, 2026, disclosed no valuation, which leaves the $6.9 billion post-money it announced on September 17, 2025 as its last confirmed valuation.87 88
11. SambaNova Systems
SambaNova Systems was founded in 2017 to develop high-performance, high-precision hardware-software systems for high-volume generative AI workloads. It raised a $350 million Series E round in February 2026.89 On July 8, 2026 it completed the first close of a $1 billion Series F at an $11 billion post-money valuation, led by General Atlantic.90
SambaNova unveiled the SN50, its latest Reconfigurable Data Unit (RDU), on February 24, 2026, with shipments to customers due in the second half of 2026, and as of July 2026 no SN50 has shipped. The SN50 delivers 5x more compute per accelerator and 4x more network bandwidth than the previous generation SN40L, and supports a three-tier memory architecture for models up to 10 trillion parameters and context up to 10 million tokens.91 SoftBank Corp. will be the first customer to deploy SN50 within its AI data centers in Japan.
SambaNova also announced a planned multi-year strategic collaboration with Intel to deliver AI inference solutions.
SambaNova Systems leases its platform to businesses through SambaCloud.92
Which are the leading AI chip startups?
We would also like to introduce some startups in the AI chip industry whose names we may hear more often in the near future.
12. Cerebras
Cerebras was founded in 2015 and is alone among major chip makers in focusing on wafer-scale chips.93 Wafer-scale chips have advantages in parallelism compared to GPUs, thanks to their higher memory bandwidth. However, designing and manufacturing such chips is an emerging technology.
Cerebras chips include:
- WSE-1 with 1.2 trillion transistors and 400k processing cores.
- WSE-2, with 2.6 trillion transistors and 850k cores, was announced in April 2021 on a 7nm process
- WSE-3, featuring 4 trillion transistors and 900k AI cores, was announced in March 2024 on a 5nm process.94
WSE-3 is the current shipping generation, and Cerebras has not announced a successor.
Cerebras’ system works with pharmaceutical companies such as AstraZeneca and GlaxoSmithKline and research labs that rely on it for simulations. It also targets LLM makers since its chips can lower inference costs for frontier models.
Cerebras also offers its chips on its cloud to enterprises.
Cerebras has traded on Nasdaq under the ticker CBRS since May 14, 2026, after an IPO that raised about $6.38 billion in gross proceeds.95 It guides FY2026 core revenue to $855-865 million, and signed a 750 MW inference agreement with OpenAI on January 14, 2026 that its own Q1 release values at more than $20 billion.96
13. d-Matrix
d-Matrix follows a novel approach, ditching the traditional von Neumann architecture in favor of in-memory computing. While this approach has the potential to resolve the bottleneck between memory and compute, it is new and unproven. In November 2025, d-Matrix raised $275 million in a Series C, valuing the company at $2 billion.97
Corsair, the company’s AI inference platform, entered full production on June 9, 2026, built on an SRAM-based in-memory compute chiplet architecture.98
The 10x speedup attached to Corsair comes from partner-run benchmarking rather than independent testing. The tester, Gimlet Labs, is a commercial partner of d-Matrix, and the benchmark post carries d-Matrix’s co-founder and CTO on the byline. The measured result is a 2-10x end-to-end request-latency improvement on gpt-oss-120b for one speculative-decoding configuration, not a blanket 10x over GPUs.
14. Rebellions
Rebellions is a Korea-based startup focused on LLM inference. It merged with another Korean semiconductor design firm, SAPEON.99 Total funding is about $850 million.100 The IPO has not happened. Rebellions said on July 8, 2026 that it targets the first or second quarter of 2027, leaning toward a KOSPI main-board listing.101
REBEL-Quad is the second-generation accelerator, four chiplets built on Samsung’s 4nm process, and Rebel100 is its productized commercial name.
15. Tenstorrent
Tenstorrent’s latest Blackhole Tensix Processor delivers 664 TFLOPS (BLOCKFP8) of performance, paired with 32GB of GDDR6 memory and 512 GB/s memory bandwidth.
The P150a card is priced at $1,399 and features four QSFP-DD 800G ports for multi-card scaling. The entry-level P100a model starts at $999.102
From January 2026, all Blackhole p150 cards ship with 120 Tensix cores instead of 140, and firmware release v19.5.0 applied the same reduction retroactively to cards already sold. Tenstorrent puts the cost at 1-2% on typical workloads.103
Tenstorrent offers a fully open-source software stack. The company raised $700 million in December 2024.104
16. Positron
Positron was founded in 2023 and focuses exclusively on transformer model inference. It takes an ASIC approach, and designs, fabricates and assembles its chips in the United States.
Products:
- Atlas (shipping now): A transformer inference server featuring 8x Positron Archer Transformer Accelerators with 256 GB total HBM. The company claims >4x performance per watt and >3x performance per dollar compared to NVIDIA Hopper systems, benchmarked on Llama 3.1 8B with BF16 compute.105
- Titan (coming 2027): A successor system with 8+ TB memory powered by 4x Asimov custom chips, designed to support up to 16 trillion parameter models and 10 million+ token context windows in an air-cooled 4U form factor.106
- Asimov (coming 2027): Custom inference accelerator silicon with 2+ TB memory per chip.
Positron raised a Series B round of more than $230 million in early 2026.107
17. _etched
Their approach sacrifices flexibility for efficiency by burning model architectures into their chips.
Etched emerged from stealth on June 30, 2026 with first-pass A0 silicon back from TSMC’s N4P process, more than $1 billion in signed customer contracts and $800 million raised.108 On July 23, 2026 it announced a $300 million Series C at a $10.3 billion valuation, led by Sequoia.109
The company no longer uses the Sohu product name. It now describes itself as building frontier inference clusters that run DeepSeek, Qwen, Mamba and Llama, so the design is no longer transformer-only.110
Two questions stay open. Etched has published no third-party benchmark and names no customer behind the contracts it reports, so its performance figures remain internal measurements. The obsolescence question the original Sohu design raised now applies to the wider model set, since a chip built around a fixed group of architectures has to be re-targeted once those architectures are superseded.
18. Taalas
Taalas was founded in early 2023 and hard-wires individual models directly into custom silicon, producing what the company calls “Hardcore Models.”111 The company claims it can transform any previously unseen AI model into custom silicon within two months.
Taalas’ architecture unifies storage and compute on a single chip at DRAM-level density, eliminating the need for HBM, advanced packaging, 3D stacking, liquid cooling, or high-speed I/O.
Products:
- HC1 (available now): A technology demonstrator hard-wired with Llama 3.1 8B, built on TSMC 6nm with 53 billion transistors. Taalas claims 17,000 tokens per second per user in a 2.5 kW air-cooled server. However, the model uses aggressive custom 3-bit and 6-bit quantization, which introduces quality degradations compared to GPU baselines.112
- HC2 (roadmap target for winter 2026, not yet a product): A second-generation platform with higher density, faster execution, and standard 4-bit floating-point formats to address the quantization limitations of HC1.
Taalas has raised $219 million in total, and reports spending $30 million to bring its first product to market with a team of 24 people.
19. Extropic
Extropic raised a $14 million round in late 2023 to use thermodynamics for computing. Its hardware page lists three parts. X0 is a silicon prototype from Q1 2025, and XTR-0 is a development platform shipped in limited numbers to selected researchers in Q3 2025. Both were unveiled on October 29, 2025. Z1, the first production-scale chip, is listed as early access in 2026.113
20. Vaire
Vaire is a UK-based startup working on reversible computing, an approach that aims to create near-zero energy chips. Unlike traditional computing, where energy is lost as heat, reversible computing recycles a significant portion of energy for subsequent computations.
Vaire’s first test chip, codenamed Ice River, is a 22nm CMOS demonstrator rather than a product. Measurements reported in September 2025 gave an energy-recovery factor of 1.77 for a capacitor array driven by Vaire’s resonator and 1.41 for a shift register on the same chip, against roughly 2x predicted in simulation.114 The 50% figure reported at tape-out applies to the resonator alone and excludes further energy overheads.115 116
21. Fractile
Fractile is a UK-based AI inference chip startup that emerged from stealth in July 2024 with $15 million in funding to challenge NVIDIA on frontier model inference.117
The company is building processors that physically interleave memory and compute on the same die, which it claims solves the simultaneous low-latency and high-throughput requirement that GPUs cannot meet for frontier model inference. Fractile claims its design can run frontier models up to 25x faster.
Fractile announced a $220 million Series B on May 13, 2026.118 Reporting on the round put the valuation at about $1 billion, a figure the company has not confirmed.
Which companies design AI chips for their own use?
These companies design accelerators for their own infrastructure rather than selling them on the merchant market, so independent benchmarks of them are scarce.
22. Apple
Apple’s Project ACDC is reported to be focused on building chips for AI inference in data centers.119 The server chip is reportedly codenamed Baltra and developed with Broadcom, and Apple has never officially acknowledged it. Reuters reported on July 15, 2026, citing The Information, that the project has been pushed back and that Apple’s in-house AI servers still run on M2 Ultra chips.120 121 M5 launched on October 15, 2025, and M5 Pro and M5 Max were announced on March 3, 2026 with a Neural Accelerator in each GPU core. Apple is strengthening its on-device AI strategy with the Core AI framework, which runs models on Apple silicon with no server dependencies, supported by an open-source Core AI models repository on GitHub.122 123
23. Meta
Meta Training and Inference Accelerator (MTIA) is a family of processors for AI workloads such as training Meta’s Llama models.
Meta renamed the MTIA family on March 11, 2026. The part the company previously called Next Gen MTIA is now MTIA 200. It is based on TSMC 5nm technology, is claimed to offer 3x the performance of MTIA v1, and is hosted in racks containing up to 72 accelerators.124 MTIA 300 is in production for ranking and recommendation training, and MTIA 400, 450 and 500 follow across 2026 and 2027.125
MTIA is currently for Meta’s internal usage. However, in the future, if Meta launched a Llama-based enterprise generative AI offering, these chips could power such an offering.
On April 14, 2026 Meta and Broadcom announced a multi-year, multi-generation strategic partnership extending through 2029 in which Broadcom delivers technology supporting Meta’s MTIA chips. The initial commitment exceeds 1 GW as the first phase of a multi-gigawatt rollout, and Broadcom says it includes the industry’s first 2nm AI compute accelerator alongside its Ethernet scale-up, scale-out and scale-across networking.126 Broadcom’s side of the partnership is covered in the Broadcom section below.
24. Microsoft Azure
At Hot Chips 2024, Microsoft unveiled Maia 100, their first custom AI accelerator, built on TSMC’s N5 process. Microsoft launched Maia 200 (codenamed Braga) on January 26, 2026, as an inference-focused AI accelerator for Azure, designed to reduce AI token costs and deliver 30% better performance per dollar over existing systems.127
Maia 200 is built on TSMC 3nm with more than 140 billion transistors, 216 GB of HBM3e at 7 TB/s, 272 MB of on-chip SRAM and more than 10 PFLOPS of FP4 compute within a 750 W SoC TDP. It is deployed in Azure’s US Central region near Des Moines, Iowa, with US West 3 near Phoenix next.128
25. OpenAI
OpenAI designed its first AI chip with Broadcom, and the leadership of its chip team has experience designing TPUs at Google.129 OpenAI has confirmed TSMC as the foundry, but neither OpenAI nor Broadcom has confirmed a process node.130 Korean supply-chain reporting has used the codename “Titan” for the chip and placed it on TSMC’s N3 process, though neither company uses that name.131
Samsung has secured an agreement to supply HBM4 memory for the OpenAI chip, reportedly allocating over 50% of its Pyeongtaek foundry capacity to HBM4 base dies for this purpose.132 OpenAI and Broadcom announced a collaboration for 10 gigawatts of custom AI accelerators in October 2025. Racks are targeted to start in the second half of 2026 and to complete by the end of 2029. The announcement states that the parties “have signed a term sheet” for the racks rather than a disclosed definitive purchase contract, and neither company has published a financial value for the collaboration.133 On June 24, 2026 the two unveiled Jalapeño, OpenAI’s first Intelligence Processor. Both companies state that engineering samples are running ML workloads in the lab at production target frequency and power, including GPT-5.3-Codex-Spark, and that the platform is designed for initial deployment by the end of 2026, which places the chip at post-tape-out engineering-sample stage rather than in mass production.134 Broadcom’s side of the arrangement, including its other custom-accelerator customers, is covered in the Broadcom section below.
What are other AI chip producers?
26. Graphcore
Graphcore is a British company founded in 2016. The company announced its flagship AI chip as IPU-POD256. Graphcore has already been funded with around $700 million.
The company’s long-term viability was at risk as it was losing ~$200 million per year.135 SoftBank announced its acquisition of Graphcore on July 11, 2024, and neither party officially disclosed the price, reported at around $600 million.136 SoftBank injected a further $457 million into Graphcore on April 10, 2026.137
27. Mythic
Mythic was founded in 2012 and is focused on edge AI. Mythic follows an unconventional path, an analog compute architecture, that aims to deliver power-efficient edge AI computing.
It has developed products such as M1076 AMP and MM1076 key card, and has already raised about $165 million in funding.138
Mythic laid off most of its staff and restructured its business with its funding round in March 2023.139
Mythic raised an oversubscribed $125 million round led by DCVC on December 17, 2025, with Honda Motor and Lockheed Martin among the strategic investors, and acquired Videantis in May 2026.140
28. Speedata
Founded in 2019 in Tel Aviv, Speedata develops an Analytics Processing Unit (APU) designed to accelerate big data analytics and AI workloads. It’s an APU that targets Apache Spark workloads, with plans to support other major data analytics platforms.
Speedata raised $44 million in a Series B round in June 2025, led by Walden Catalyst Ventures, 83North, and others, bringing its total funding to $114 million. The company claims its APU outperforms general-purpose processors and GPUs by replacing racks of servers with a single chip, offering superior performance and energy efficiency for data processing.141
29. Axelera AI
Founded in July 2021 in Eindhoven, Netherlands, Axelera AI specializes in AI hardware acceleration technology for computer vision and generative AI. The company is developing Titania, an AI inference chiplet based on its Digital In-Memory Computing (D-IMC) architecture, designed to accelerate AI workloads from edge to cloud.
Axelera AI raised more than $250 million on February 24, 2026, taking its total to more than $450 million in equity, grants and venture debt.142 143
Its Europa AIPU, announced on October 21, 2025, is rated at up to 629 TOPS INT8 across 8 second-generation AI cores and 16 RISC-V processors at around 45 W, with shipments promised for the first half of 2026. An Andes Technology release in June 2026 described it as sampling to lead customers. Titania remains targeted for 2028.
30. NextSilicon
NextSilicon, founded in Tel Aviv in 2017, sells Maverick-2, a runtime-reconfigurable dataflow accelerator built on TSMC’s 5nm process and shipped as a PCIe Gen 5 card with 96 GB of HBM3E or as an OAM module with 192 GB.144 The company says Maverick-2 is deployed at dozens of customer sites; the one named site is Sandia National Laboratories’ Spectra, a 64-node system with 128 dual-die Maverick-2 accelerators that passed full system acceptance under Sandia’s Vanguard program in May 2026 after running HPCG, LAMMPS and SPARTA.145 146 The 10x-a-GPU-at-half-the-power figure NextSilicon quotes is its own, not an independent measurement. In June 2026 the company said it would turn Arbel, the RISC-V core inside Maverick-2 and also a standalone 2.5 GHz test chip, into 64-core and 128-core server processors targeting 3.4 GHz and expected in the first quarter of 2028.147
Which vendors co-design custom AI ASICs?
Several accelerators listed above are not designed alone by the company whose name is on them. Broadcom co-designs custom accelerators, which it calls XPUs, with the customer that will operate them, and supplies the Ethernet switching and fabric silicon that connects them. It is a supplier to several vendors covered earlier in this article rather than a competitor to them.
31. Broadcom
On its Q2 FY2026 earnings call on June 3, 2026, Broadcom reported AI semiconductor revenue of $10.8 billion, up 143% year over year, guided full-year FY2026 AI semiconductor revenue to $56 billion, up about 180% from fiscal 2025, and reiterated FY2027 guidance above $100 billion.148 149
On that call Broadcom walked through six core AI customers but named four of them, Google, Anthropic, OpenAI and Meta. The other two remain undisclosed and were described as two customers with $6 billion in purchase orders received to date, with shipments beginning in late 2026 and accelerating into 2027. Published lists that name all six are analyst inference rather than a Broadcom disclosure.150
Broadcom’s disclosure varies by customer:
- Google has a multi-generation TPU and AI-networking agreement, with no gigawatt figure given. Broadcom’s Form 8-K discloses a Long Term Agreement to develop and supply custom TPUs for Google’s future generations, plus a Supply Assurance Agreement covering networking components through up to 2031.151
- Anthropic takes over 1 GW of TPU-based compute in 2026, plus an April agreement for a further 5 GW of compute beginning in 2027. The same Form 8-K puts the figure at approximately 3.5 gigawatts from 2027, consumption of which it ties to Anthropic’s continued commercial success. The 3.5 GW figure comes from Broadcom’s filing, while Anthropic’s own post quantifies the commitment as “multiple gigawatts”. The filing also frames the arrangement as an expansion of an existing collaboration rather than a new three-way contract.152
- For OpenAI, silicon has been delivered, production is expected in late 2026, and OpenAI is contracted for 1.3 GW in 2027 within the larger 10 GW-by-2029 arrangement. The chip itself is covered in the OpenAI section above.153
- Meta has a multi-generation MTIA XPU partnership targeting 3 GW through the end of 2028, with an initial 1 GW order delivering from the second half of 2027. Hock Tan is transitioning off Meta’s board to an advisor role.154 155
On February 26, 2026 Broadcom began shipping a 2nm custom compute SoC, built on its 3.5D eXtreme Dimension System in Package (XDSiP) platform. That SoC is for Fujitsu, supporting the FUJITSU-MONAKA processor program, rather than a hyperscaler XPU, and Broadcom says XPUs for its broader customer base ship from the second half of 2026.156 In networking, Broadcom said in March 2026 that Tomahawk 6 is the sole 102.4T switch shipping in production volume, and Jericho 4, a 51.2 Tbps fabric router launched in August 2025, is shipping.
On June 9, 2026 Broadcom announced the AI XPV Platform with Apollo and Blackstone as initial anchor investors. The Platform is designed to enable more than 20 gigawatts of compute capacity through 2028, using Broadcom XPUs and networking customized for frontier AI labs including Anthropic and OpenAI. It launched with an initial tranche of $35 billion, funding Anthropic’s previously announced expansion of more than 1 gigawatt in Fluidstack-based sites from mid-2026. The more than 20 gigawatts is the Platform’s design target through 2028 and is not funded by that tranche.157
Third-party estimates of the custom-ASIC share of the AI processor market depend on what is being counted. Bloomberg Intelligence splits the custom-ASIC market between Broadcom at 60% to 80% and Marvell at 20% to 25%.
32. Marvell
Marvell designs custom AI silicon, which it calls XPUs, for hyperscalers, alongside the interconnect, optics and networking silicon that connects those chips. Bloomberg Intelligence puts it second to Broadcom in the custom AI ASIC market.
Marvell reported record fiscal 2026 revenue of $8.195 billion, up 42%.158 For the quarter reported on May 27, 2026 it posted record data center revenue of $1.83 billion, up 27% year over year, guided to roughly $11.5 billion for fiscal 2027 and reaffirmed a target of more than $10 billion in custom business revenue in fiscal 2029, both management targets rather than reported results.
On March 31, 2026, NVIDIA and Marvell announced a strategic partnership that connects Marvell to the NVIDIA AI factory and AI-RAN ecosystem through NVLink Fusion, together with collaboration on silicon photonics. NVIDIA invested $2 billion in Marvell as part of it. Under the partnership, Marvell provides custom XPUs and NVLink Fusion-compatible scale-up networking.159
Marvell closed three acquisitions between February and April 2026, all on the optical and interconnect layer:
- Celestial AI, completed on February 2, 2026 at $3.25 billion.160
- XConn Technologies, completed on February 10, 2026 at approximately $540 million.
- Polariton Technologies, a Swiss ETH Zurich spinoff working on plasmonics-based silicon photonics, acquired on April 22, 2026 on undisclosed terms.
Marvell’s position at Amazon is disputed. SemiAnalysis wrote in December 2025 that “Marvell ends up being the big loser from this. While they designed Trainium2, they lost the design bakeoff with Alchip for this generation,” attributing the loss to Trainium2 execution problems including timeline slippage and RDL interposer issues that Alchip had to fix, and describing Trainium3 as an Annapurna front-end design with Alchip handling back-end physical and package design.161 On December 8, 2025, Benchmark downgraded Marvell to Hold, with analyst commentary that Marvell had lost both Trainium 3 and Trainium 4 to Alchip, and the stock fell about 7%. Two limits apply to that reporting. The sourced technical account stops at Trainium3, and the Trainium 4 loss is the sell-side analyst’s assertion. Marvell, Amazon’s Annapurna Labs and Alchip have confirmed none of it, and other analysts including JPMorgan pushed back.
The size of the account explains the reaction. Trainium3 has been generally available since December 2, 2025, and Amazon disclosed on its first-quarter 2026 earnings call on April 29, 2026 that it holds over $225 billion in revenue commitments for Trainium and that its chips business is at an annual revenue run rate above $20 billion.
Which CPUs run alongside AI accelerators?
Accelerators do not run on their own. Every AI rack pairs them with host CPUs. NVIDIA’s Vera CPU carries 88 custom Olympus cores, which are Arm compatible, with 176 threads via Spatial Multithreading and 1.5 TB of LPDDR5X. Google’s Axion is the host CPU for both eighth-generation TPUs, the first time Google has replaced x86 in that role, and its N4A VMs became generally available in late January 2026. AMD’s Helios racks pair Instinct GPUs with 6th Gen EPYC “Venice” x86 CPUs.
Arm
Arm announced on March 24, 2026 that it is “extending into production silicon products for the first time in the company’s history,” starting with the Arm AGI CPU, a data center CPU for agentic AI infrastructure. Meta “serves as the lead partner and co-developer.”162 163
Arm states the CPU carries up to 136 Arm Neoverse V3 cores, 6 GB/s of memory bandwidth per core at sub-100ns latency and a 300 W TDP, scaling to 8,160 cores per air-cooled rack and more than 45,000 cores per liquid-cooled rack. Arm claims more than 2x performance per rack versus x86. These are Arm’s own figures and have not been independently measured.164
Arm continues to license IP and Compute Subsystems (CSS), so the AGI CPU adds a silicon product line rather than replacing the licensing business. Early systems are available now, with broader availability expected in the second half of 2026, and alongside Meta, Arm names Cerebras, Cloudflare, F5, OpenAI, Positron, Rebellions, SAP and SK Telecom as committed customers, four of which appear as vendors elsewhere in this article.165 Meta shows how far the roles now blur. It designs its own MTIA silicon, is Arm’s AGI CPU lead partner, is an announced Qualcomm data center CPU customer, and buys from AMD and Broadcom.
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*Most popular & recent chips are selected.
7 edge AI chips
The demand for low-latency processing has driven innovation in edge AI chips. These chips’ processors are designed to perform AI computations locally on devices rather than relying on cloud-based solutions:
*These are the maximum values quoted by each vendor, and they are not directly comparable across rows. A figure quoted at FP4 or INT4 describes a different operation from one quoted at INT8, and rows marked sparse are vendor figures that assume sparsity. TOPS is tera operations per second, TFLOPS is tera floating-point operations per second, and GOPS is giga operations per second.
On July 24, 2026, Microchip Technology signed a definitive agreement to acquire Hailo, expected to close by the end of the quarter ending September 30, 2026 subject to closing conditions and regulatory approvals, on undisclosed terms.166 The acquisition followed a difficult year. Calcalist reported on April 3, 2026 that Hailo’s valuation had fallen by more than half from a $1.2 billion peak to under $500 million, and Hailo cut about half its remaining staff in June 2026.
Foundry partners and TSMC’s role
TSMC is a pure-play foundry. It manufactures semiconductors based on customer designs rather than creating its own chips, distinguishing it from companies like NVIDIA and AMD. Samsung Foundry and Intel Foundry Services compete in the same market.
N2, TSMC’s 2nm node, entered volume production in the fourth quarter of 2025 and accounted for 3% of wafer revenue in the second quarter of 2026, against 33% for 5nm, 30% for 3nm and 11% for 7nm.167 TSMC’s roadmap places A16 in 2027, A14 in the second half of 2028, and A13 and A12 in 2029.168 TSMC fabricates AI accelerators for the following designers:
Alibaba’s 2019 Hanguang 800 inference chip, its last TSMC-produced part, is not included. US export controls now bar TSMC from producing advanced AI chips for Chinese designers, and foundries must review any shipment at 7nm and below to Chinese designers. Alibaba’s 2026 AI silicon is fabricated domestically, with capacity at SMIC the stated constraint.169
SemiAnalysis reported on March 12, 2026 that front-end N3 wafer capacity has displaced CoWoS packaging as the dominant bottleneck in AI chip supply, with CoWoS tight but easing. TrendForce expects the CoWoS supply-demand gap to narrow from about 20% to about 10% by the end of 2026.170 Micron reached high-volume production of HBM4 36GB 12H for NVIDIA’s Vera Rubin platform on March 16, 2026, at pin speeds above 11 Gb/s.171
Expansion plans
TSMC’s announced US investment totals $265 billion across 12 leading-edge fabrication and packaging facilities, after an incremental $100 billion Arizona commitment announced on July 16, 2026.172
The March 2025 reports of a TSMC-led joint venture to run Intel’s foundry division did not produce a deal. TSMC denied active discussions on April 17, 2025, and on September 26, 2025 stated that it “has never entered into talks with any company on establishing a joint venture or engaging in the licensing or transfer of technology.”173 Intel was recapitalized instead, with the US government taking a 9.9% stake for $8.9 billion in August 2025.174
What are the AI chip makers in China?
Due to US sanctions preventing many Chinese companies from acquiring the most advanced AI chips from AMD and NVIDIA, Chinese buyers have increased their purchases from local producers.
Huawei and Alibaba are covered above. Other Chinese AI chip producers include:
- Cambricon (SHA: 688256) reported FY2025 revenue of RMB 6.4972 billion, up 453.21% year over year, and its first full-year profit at RMB 2.0592 billion. Its market capitalization passed RMB 1 trillion on June 30, 2026, a first for the STAR Market.
- Baidu Kunlunxin unveiled two chips on November 13, 2025. The Kunlun M100 is optimized for large-scale inference and was slated for launch in early 2026, and the Kunlun M300, built for training and inference of ultra-large multimodal models, is targeted for 2027. Baidu also presented two supernode systems, Tianchi 256 (available in H1 2026) and Tianchi 512 (available in H2 2026), both built from Baidu’s existing Kunlun P800 chips rather than from the M100 or M300.
- Biren, founded by NVIDIA alumni, listed on the Hong Kong Stock Exchange main board on January 2, 2026, raising HK$5.58 billion (about US$717 million).
- Moore Threads (SHA: 688795) listed on the STAR Market on December 5, 2025. FY2025 revenue was RMB 1.505 billion, up 243.37% year over year. The company remains unprofitable and has been on the US Entity List since 2023.
- MetaX listed on the STAR Market on December 17, 2025, raising about RMB 4.2 billion (US$586-596 million), and has since confidentially filed for a secondary Hong Kong listing.
- Iluvatar CoreX (HKEX: 9903) listed on the Hong Kong main board on January 8, 2026, raising about HK$3.68 billion.
- Enflame has not listed. Its IPO registration was approved by the CSRC on July 9-10, 2026, clearing it to raise RMB 6 billion (about US$883 million), but the shares have not begun trading as of July 2026.175 Its 2025 revenue was RMB 990 million against a RMB 1.2 billion net loss, with Tencent, a 20.3% shareholder, accounting for 83.8% of it.
- SMIC, the foundry most of these designers depend on, had N+3 (5nm-class) in volume production as of June 2026, 7nm capacity of roughly 45,000 to 60,000 wafers per month, and $9.3 billion of 2025 revenue.
Domestic share of China’s AI accelerator market
The table below comes from an IDC report seen by Reuters.176 It counts unit shipments of accelerator cards, not servers and not revenue.
Domestic supply is itself concentrated. Huawei accounts for roughly half of Chinese-vendor shipments, with the rest split across Alibaba’s T-Head, Baidu Kunlunxin, Cambricon, Hygon, MetaX and Iluvatar CoreX.177
FAQs
Chips and the equipment that builds them are the most complex machines ever built by humans. Though there are many companies in the semiconductor ecosystem, we focused on chip designers like NVIDIA in this article.
Most chip designers outsource chip manufacturing to foundries like TSMC. Foundries use lithography equipment produced by companies like ASML to manufacture these chips. The ecosystem is supported by providers like Arm and Synopsys that supply IP and design tools.
A rising number of parameters, dataset size, and compute have made generative AI models more accurate. To build better deep learning models and power generative AI applications, organizations require increased computing power and memory bandwidth.
Powerful general-purpose chips (such as CPUs) cannot support highly parallelized deep learning models. Therefore, AI chips (e.g., GPUs) that enable parallel computing capabilities are increasingly in demand.
Hyperscalers are responding to this by designing their own chips, a process that takes years. The rest need to follow one of these routes to build their own AI models. They can rent capacity from cloud GPU providers or buy hardware from the top AI chip vendors listed in this article.
AI hardware is also called neural processing units (NPUs), AI accelerators, or deep learning processors (DLPs).
Further reading
For hands-on performance comparisons of the chips covered in this article, see our benchmarks:
- Multi-GPU benchmark: How NVIDIA’s B200, H200, H100, and AMD’s MI300X scale across 1, 2, 4, and 8-GPU configurations for LLM inference, with throughput, latency, and cost-per-token analysis.
- GPU concurrency benchmark: How NVIDIA’s B200, H200, H100, and AMD’s MI300X handle 1 to 512 concurrent requests, including system throughput, per-query speed, end-to-end latency, and tokens-per-dollar at each concurrency level.
- CUDA vs ROCm: How AMD’s ROCm compares with NVIDIA’s CUDA on framework support and portability, the software question behind AMD’s position in this article.
- Edge AI chip makers: The vendors in the edge table above covered one by one, with the use cases each part targets.
- Cloud GPU providers: 60+ providers that rent the accelerators covered here by the hour, for teams that do not buy hardware.
Cite this research
Pick the format that matches where you're publishing. Pasting the link version into your CMS preserves the backlink.
@misc{dilmegani2026,
author = {Dilmegani, Cem and Sarı, Ekrem},
title = {{Top 30+ AI Chip Makers: NVIDIA & Its Competitors}},
year = {2026},
month = jul,
howpublished = {\url{https://aimultiple.com/ai-chip-makers}},
note = {AIMultiple. Retrieved July 28, 2026}
}Reference Links
Cem's work has been cited by leading global publications including Business Insider, Forbes, Washington Post, global firms like Deloitte, HPE and NGOs like World Economic Forum and supranational organizations like European Commission.
Throughout his career, Cem served as a tech consultant, tech buyer and tech entrepreneur. He advised enterprises on their technology decisions at McKinsey & Company and Altman Solon for more than a decade. He also published a McKinsey report on digitalization.
He led technology strategy and procurement of a telco while reporting to the CEO. He has also led commercial growth of deep tech company Hypatos that reached a 7 digit annual recurring revenue and a 9 digit valuation from 0 within 2 years. Cem's work in Hypatos was covered by leading technology publications like TechCrunch and Business Insider.
Cem regularly speaks at international technology conferences. He graduated from Bogazici University as a computer engineer and holds an MBA from Columbia Business School.
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You forgot to include Tesla with their DOJO supercomputer. From the ground-up, the supercomputer was specifically designed for machine learning and image recognition - which means that every component was designed for it including, but not limited to, PCI board design, CPU, RAM, cooling, power, scalable hardware design and software. If I'm not mistaken, the AI is also the second most widely tested and used in the "wild", just below that of Google due to Google using it in their Search.
Thank you for your feedback, Dave! Here we are only covering companies that sell the chips that they produce. Therefore, companies like Tesla that build supercomputers for their own use or companies that embed chips in their products are out of our scope.
surprised that brainchip (akida) missing in this report. any reasons?
All included companies here raised $100+M. Last time we collected the data, that wasn't the case for akida. Why don't you reach out to us at info@aimultiple.com and let's discuss why it should be included. Thank you!